Power booster method and apparatus for improving the performance of radio frequency linear power amplifiers

ABSTRACT

Generally, the invention relates to a method and apparatus to improve the performance of radio frequency power amplifiers. More particularly, the present invention discloses the use of a power booster in conjunction with a radio-frequency linear power amplifier to reduce intermodulation distortion of an amplified signal.

RELATED APPLICATION

[0001] This application claims the benefit of U.S. Provisional Patent Application Ser. No. 60/181,345 filed on Feb. 9, 2000 (Attorney Docket No. 004711.P001Z) and U.S. Provisional Patent Application Ser. No. 60/185,311 filed on Feb. 28, 2000 (Attorney Docket No. 004711.P002Z).

FIELD

[0002] The present invention relates generally to power amplifier systems, and more particularly to a method and apparatus to increase the linearity of radio frequency power amplifiers by minimizing intermodulation distortion.

BACKGROUND OF THE INVENTION

[0003] Communication services providers, such as cellular system operators, are subject to very strict bandwidth usage spectrum constraints imposed by the Federal Communications Commission (FCC). The FCC licenses transmission channels in the radio frequency spectrum and requires that signals be confined within certain emission limit masks in order to prevent interference caused by signals straying or spilling into adjacent transmission channels. The “emission mask” is a power spectrum density envelope. The maximum emitted power allowed varies as a function of the frequency offset from the nominal allocation center frequency. In other words, the emission mask determines the maximum power which may be emitted at a specific frequency for each frequency within the channel allocation. This requires that sideband spillover, the amount of energy outside the licensed channel, be sharply attenuated.

[0004] Meeting these emission mask requirements is specially difficult when implementing modern, digitally-based, modulation formats, such as Code Division Multiple Access (CDMA), or Time Division Multiple Access (TDMA). Attenuating the sidebands to meet FCC requirements using such modulation requires very linear signal processing systems and components. Designing linear components, and in particular power amplifiers, at radio frequencies is costly and challenging to achieve.

[0005] Radio-frequency (RF) linear power amplifiers (LPA) are typically used in digital cellular base stations to boost the power of a transmitted signal. RF power amplifiers for cellular communications typically operate in the Megahertz (MHz) and Gigahertz (GHz) frequency regions. Boosting a transmitted signal usually requires a LPA with a high ratio of peak-to-average power output (dynamic headroom), typically of at least 10 dB. The challenge is to design LPAs which can provide such dynamic headroom while minimizing sideband spillover without distorting the boosted signal.

[0006] Typically, conventional LPA designs have relied on increasing the number of additional RF power transistors in order to achieve the increasingly higher dynamic headroom required by newer implementations. However, using additional RF power transistors has the highly undesirable effect of raising the overall parts count, the manufacturing costs, and the DC current consumption of the LPA.

[0007] A fundamental problem in designing linear RF power amplifiers is that power amplifiers are inherently non-linear devices and generate unwanted intermodulation distortion (IMD).

[0008] Linearity refers to a characteristic of power amplifiers where there is a substantially constant (linear) gain between an input signal and an output signal. Typically, power amplifiers only exhibit linear gain for a range of input signal voltage levels. This range is often called the linear region of the power amplifier. If the input signal voltage is below the minimum voltage for the linear region or above the maximum voltage for the linear region, then intermodulation distortion occurs.

[0009] Intermodulation distortion manifests itself as spurious signals in the amplified RF output signal, separate and distinct from the RF input signal. IMD occurs when different frequencies from the input signal mix to produce sum and difference frequencies which did not exist in the input signal. It is the result of the behavior of amplifier components when operating outside the linear region.

[0010] Therefore, a linear RF power amplifier is desired which has substantially linear characteristics, minimizes both sideband spillover and intermodulation distortion, and does not increase the DC current consumption over conventional LPAs.

BRIEF DESCRIPTION OF THE DRAWINGS

[0011]FIG. 1 is a system-level illustration of a first embodiment of the present invention to increase the linearity of the RF power amplifiers.

[0012]FIG. 2 illustrates the transfer characteristic of a linear power amplifier operating at 30 watts RF power output.

[0013]FIG. 3 illustrates the transfer characteristic of a linear power amplifier of operating at 30 watts RF power output and supplemented by the power booster of the present invention.

[0014]FIG. 4 is a system-level illustration of a second embodiment of the present invention to increase the linearity of the RF power amplifiers.

[0015]FIG. 5 is a system-level illustration of a third embodiment of the present invention to increase the linearity of the RF power amplifiers.

DETAILED DESCRIPTION OF THE INVENTION

[0016]FIG. 1 is a first embodiment of the present invention disclosing a conventional RF linear power amplifier (LPA) 102 with a signal input port 104, a signal output port 106, and a supply voltage port 108. Also disclosed in FIG. 1 is a power detector 110 to sample the overall output power of the LPA 102 and coupled to a microprocessor 112. The microprocessor 112 is configured to instruct a power booster 114 to increase the DC voltage from a first port 116 to a second port 118 based on the output power measurement received by microprocessor 112 from the power detector 110. The second port 118 is then coupled to the supply voltage port 108 of the LPA 102. In one embodiment, the power detector 110 may be a root-mean-square power detector.

[0017] According to one embodiment of the invention, the power booster 114 may be capable of both increasing and decreasing the DC voltage from a first port 116 to a second port 118. Thus, the microprocessor 112 may also be configured to instruct the power booster 114 to increase or decrease the DC voltage. In one embodiment of the invention, the power booster may be adaptively and dynamically adjusted to provide a greater or lesser source voltage to the power amplifier.

[0018] In another embodiment of the invention, a machine-readable medium may contain instructions to adjust the power booster's configuration. That is, when the instructions in the machine-readable medium are executed by a processor, it causes the processor to configure the power booster to increase or decrease the source voltage to the power amplifier.

[0019] LPAs typically comprise RF power transistors configured to amplify a signal between an input port and an output port. Conventionally, cellular base stations supply a power source of +26 to +28 Volts DC to communication equipment within a base station. This limits the peak-to-average power output capability (dynamic headroom) an RF power amplifier may provide for transmissions.

[0020] According to one embodiment of the present invention, the LPA 102 may be comprised of one or more RF lateral diffusion metal oxide semiconductor (LDMOS) power transistors. One characteristic of MOS devices is that they behave like voltage-controlled current sources. Thus, the power output of a MOS device increases approximately as a factor of the square of the bias voltage. Consequently, raising the bias voltage of LDMOS transistors within an LPA increases their dynamic headroom thereby increasing their output linearity and improving the overall IMD performance of the LPA.

[0021]FIG. 2 illustrates the performance plot of a LPA, like that of FIG. 1, without the power booster circuit 114. For purposes of providing an example, a true CDMA modulated waveform or signal is depicted by the graph. However, the present invention is not limited to any particular transmission frequency, modulation scheme, or signal type. Thus, this particular graph and data thereon are not to be construed as limitations upon the present invention. In FIG. 2, the signal is illustrated at three different stages. The first region 202 depicts the un-amplified reference signal. The second region 204 shows the signal as it transitions from an un-amplified to amplified state. The third region 206 depicts the signal after it has been amplified by an LPA. At the third region 206, the signal power is 30 Watts with the LPA operating near its maximum power output. As measured at the marker 208, the signal is centered about 1.9468 GHz and has an IMD performance measured at −41.33 dBc.

[0022]FIG. 3 illustrates the performance plot of a LPA, like that of FIG. 1, including the power booster circuit 114. As with FIG. 2, a true CDMA modulated waveform is depicted by the graph. The first region 302 depicts the un-amplified reference signal. The second region 304 shows the signal as it transitions from an un-amplified to an amplified state. The third region 306 depicts the signal after it has been amplified by an LPA supplemented by the power booster 114. At the third region 306, the signal power is 30 Watts. As measured at the marker 308, the signal is centered about 1.9468 GHz and has an improved IMD performance measured at −48.67 dBc. This is an improvement of 7 dB over the LPA without the power booster shown in FIG. 2.

[0023] Thus, a setup as shown in FIG. 1 may be used to boost the voltage to LPAs in existing cellular stations thereby achieving the desired reduction in the IMD of the amplified signal. In various embodiments of the invention, the power booster 114 (FIG. 1) may increase the source voltage (V+ in FIG. 1) by an additional 1 to 20 volts to achieve the desired improvement in IMD. In one embodiment of the invention, the power booster 114 (FIG. 1) increases the source voltage (V+ in FIG. 1) by an additional 2 to 15 volts.

[0024] A power booster may be designed in numerous conventional configurations known to those of ordinary skill in the art. For example, in one embodiment the power booster may comprise a DCto-DC converter capable of boosting or reducing a voltage from a first port to a second port.

[0025]FIG. 4 illustrates another embodiment of the present invention, with an input port 404 to receive a signal, a conventional LPA 402 to amplify the input signal, and an output port 406 to provide the amplified signal. The LPA 402 is coupled to a power booster 414 which is in turn coupled to a voltage source (V+) via a first port 416. The power booster 414 acts to raise the voltage (V+) from the first port 416 and supply an increased voltage (V++) to the supply voltage port 408 of the LPA 402. As previously noted, the increased voltage serves to reduce the IMD of the amplified signal observed at the output port 406 of the LPA 402.

[0026] To configure the power booster 414, the power booster 414 comprises a third port 422 and a fourth port 424.

[0027] According to one embodiment of the invention, the output voltage (V++) of the power booster 414 may be set by a resistive load 420 between the third port 422 and the fourth port 424. In one embodiment of this invention, the resistive load 420 may be a manually adjustable impedance component such as a potentiometer. For a given resistive value between the third port 422 and the fourth port 424, the amount that the DC voltage output (V++) increases over the DC voltage input (V+) will remain fixed.

[0028] In one embodiment of the invention, the power booster 414 detects the voltage differential between the third port 422 and the fourth port 424 in order to set its DC voltage output (V++). In another embodiment, the power booster 414 sets its DC voltage output (V++) by measuring the current through the resistive load 420 between third port 422 and the fourth port 424.

[0029]FIG. 5 illustrates another embodiment of the present invention. The DC output voltage (V++), at a second port 518 of the power booster 514, is fixed and constant even when the DC input voltage (V+), at a first port 516, may vary. The power booster 514 may regulate the DC output voltage (V++) at the second port 518 by comparing the voltage at a third port 522 to a reference voltage at a fourth port 524. The voltage present at the third port 522 is the result of a voltage divider formed by a first resistor 526, coupled between DC voltage output port 518 and the third port 522, and a second resistor 528, coupled between the third port 522 and ground 530. A reference voltage 510 is coupled to the fourth port 524 of the power booster 514. By comparing the reference voltage at the fourth port 524 and the voltage at the third port 522, the power booster 514 may be instructed to hold its DC output voltage (V++), at the second port 518, to a predetermined constant value. The predetermined constant value may be directly proportional to the reference voltage 510 coupled to the fourth port 524.

[0030] While the invention has been described and illustrated in detail, it is to be clearly understood that this is intended by way of illustration and example only and is not to be taken by way of limitation, the spirit and scope of this invention being limited only by the terms of the following claims. 

What is claimed is:
 1. A method to reduce intermodulation distortion of a power amplifier, comprising: providing a signal to a power amplifier; and boosting the voltage source power to the power amplifier to reduce intermodulation distortion.
 2. The method of claim 1 , wherein boosting the voltage source power comprises: configuring a power booster to boost the voltage source power to the power amplifier.
 3. The method of claim 1 , wherein boosting the voltage source power comprises: boosting the voltage source above 27 Volts DC.
 4. The method of claim 1 , wherein boosting the voltage source power comprises: boosting the voltage source by 1 to 15 Volts DC.
 5. The method of claim 1 , wherein boosting the voltage source power comprises: boosting the voltage source by 2 to 8 Volts DC.
 6. The method of claim 1 , further comprising: sampling the power amplifier's output.
 7. The method of claim 6 , wherein boosting the voltage source power comprises: adaptively boosting the power booster based on the sampling of the power amplifier's output.
 8. The method of claim 1 , wherein boosting of the voltage source power is done only when the power amplifier is operating within twenty percent of its maximum power output.
 9. The method of claim 1 , wherein the power amplifier is a radio-frequency linear power amplifier.
 10. The method of claim 1 , wherein the power amplifier comprises lateral diffusion metal oxide semiconductor transistors.
 11. An apparatus to reduce intermodulation distortion of a power amplifier, comprising: a power amplifier; a power booster comprising: a first port coupled to a power source; and a second port coupled to the amplifier and provide voltage source power to the power amplifier; wherein the power booster increases the voltage from the first port to the second port.
 12. The apparatus of claim 11 , further comprising: a sampling device to sample the power amplifier's output signal.
 13. The apparatus of claim 12 , wherein the sampling device comprises a root-mean-square detector.
 14. The apparatus of claim 12 , further comprising: a microprocessor coupled to the sampling device and coupled to the power booster to configure the power booster based on the measured sample of the power amplifier's output.
 15. The apparatus of claim 11 , wherein the power booster comprises: a third and a fourth port to configure the power booster.
 16. The apparatus of claim 15 , further comprising: an adjustment component coupled between to the third port and fourth port of the power booster to configure the power output of the booster.
 17. The apparatus of claim 15 , wherein the adjustment component comprises a potentiometer.
 18. The apparatus of claim 15 , further comprising: a reference voltage source coupled to the fourth port, the third port coupled to the second port of the power booster to configure the power output of the booster.
 19. The apparatus of claim 11 , wherein the power amplifier comprises a radio-frequency linear power amplifier.
 20. The apparatus of claim 11 , wherein the power amplifier comprises a plurality of transistors.
 21. The apparatus of claim 20 , wherein the power transistors comprise lateral diffusion metal oxide semiconductor transistors.
 22. An apparatus to reduce intermodulation distortion of a power amplifier, comprising: a power amplifier; and means for boost the source voltage of the power amplifier so as to reduce intermodulation distortion.
 23. The apparatus of claim 22 , further comprising: means for configuring a power booster to boost the voltage source power to the power amplifier.
 24. The apparatus of claim 22 , further comprising: means for sampling the power amplifier's output.
 25. The apparatus of claim 22 , wherein boosting the voltage source power comprises: means for adaptively configuring the power booster based on the sampling of the power amplifier's output.
 26. The apparatus of claim 22 , wherein the power amplifier comprises lateral diffusion metal oxide semiconductor transistors.
 27. A machine-readable medium comprising at least one instruction to boost the source power of a power amplifier, which when executed by a processor, causes the processor to perform operations comprising: configuring a power booster to provide an increased source voltage to the power amplifier.
 28. The machine-readable medium of claim 27 , further comprising at least one instruction for configuring the power booster to provide a decreased source voltage to the power amplifier.
 29. The machine-readable medium of claim 27 , further comprising at least one instruction to obtain a sample of the power amplifier's output.
 30. The machine-readable medium of claim 29 , further comprising at least one instruction to adaptively configure the power booster to increase or decrease the source voltage to the power amplifier based on the sample of the power amplifier's output.
 31. A system to boost the source power of a power amplifier, comprising: a first sub-system to configure a power booster to provide an increased source voltage to the power amplifier.
 32. The system of claim 31 , wherein the first sub-system can configure the power booster to provide a decreased source voltage to the power amplifier.
 33. The system of claim 31 , further comprising: a second sub-system to obtain a sample of the power amplifier's output.
 34. The system of claim 31 , further comprising: a second sub-system to configure the power booster to increase or decrease the source voltage to the power amplifier. 